Method for testing the validity of initial-condition statements in circuit simulation, and correcting inconsistencies thereof
US7441213B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2006 |
| Grant date | Oct 21, 2008 |
| Priority date | — |
| Expiry date | Aug 19, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and a system for validating initial conditions (ICs) generally provided by a user when simulating a VLSI circuit are described. Inconsistent ICs sets are detected and replaced by consistent subsets thereof. The method selects the resistance and source values in a Norton or Thevenin circuit used to enforce the IC, and detects when specified ICs are inconsistent while preserving critical or fragile ICs when a two DC-pass approach is used. It further correlates the set of consistent ICs thus obtained with an equivalent circuit and simultaneously provides an input for future use. This allows a user to be notified and given a measure of how bad the inconsistencies are. Detecting inconsistencies is achieved either by measuring the holding current or by measuring the voltage drift if the two DC-pass approach is used.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.