Modulated temperature method of atomic layer deposition (ALD) of high dielectric constant films
US7442415B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2003 |
| Grant date | Oct 28, 2008 |
| Priority date | — |
| Expiry date | Sep 30, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/022
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a layer of high-k dielectric material in an integrated circuit includes preparing a silicon substrate; forming a high-k dielectric layer by a sequence of ALD cycles including: depositing a first layer of metal ligand using ALD with an oxygen-containing first precursor; and depositing a second layer of metal ligand using ALD with a second precursor; repeating the sequence of ALD cycles N times until a near-critical thickness of metal oxide is formed; annealing the substrate and metal oxide layers every N ALD cycles in an elevated temperature anneal; repeating the sequence of ALD cycles and elevated temperature anneals until a high-k dielectric layer of desired thickness is formed; annealing the substrate and the metal oxide layers in a final annealing step; and completing the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.