Semiconductor device and method of manufacturing the same
US7442995B2 · kind B2 · utility
3Cited by
21References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 28, 2005 |
| Grant date | Oct 28, 2008 |
| Priority date | — |
| Expiry date | Jan 6, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0227
Abstract
Each of channel regions 2a and 3b is covered by a gate electrode 6 via a gate insulation film 5 and side wall spacers 9 from its top face to both side faces along an x-direction. In other words, there is no insulation material of an STI element isolation structure 4 on both side faces along the x-direction of each of the channel regions 2b and 3b (in a non-contact state), thereby preventing stress in a z-direction from being applied by the STI element isolation structure 4 to each of the channel region 2b and 2b.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.