System and method for routing supply voltages or other signals between side-by-side die and a lead frame for system in a package (SIP) devices
US7443011B2 · kind B2 · utility
3Cited by
4References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 10, 2006 |
| Grant date | Oct 28, 2008 |
| Priority date | — |
| Expiry date | Aug 20, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit or chip includes a first die and a second die positioned on a lead frame of a package including a lead frame, such as a QFP, DIP, PLCC, TSOP, or any other type of package including a lead frame. The integrated circuit further includes a redistribution layer formed on the first die to couple selected bond fingers of the lead frame to selected bonding pads of the first and second die. The selected bond fingers may correspond to bond fingers that receive a first supply voltage or the first supply voltage and a second supply voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.