Inventor · Meridian, ID, US

Michael D. Cusack

20Patents
6h-index
19Co-inventors
66Inventor score

Filing activity: Mar 10, 1982 → Jun 29, 2015

Most-cited inventions

PatentTitleAreaCited byStatus
US4711700A Method for densifying leadframe conductor spacing Emerging Cross-Sectional Technologies 38 Expired
US4730160A Programmable thermal emulator test die Physics 17 Expired
US4753820A Variable pitch IC bond pad arrangement Emerging Cross-Sectional Technologies 15 Expired
US4875138A Variable pitch IC bond pad arrangement Emerging Cross-Sectional Technologies 12 Expired
US4959706A Integrated circuit having an improved bond pad Electricity 11 Expired
US7629675B2 System and method for routing signals between side-by-side die in lead frame type system in a package (SIP) devices Electricity 7 Active
US7977773B1 Leadframe including die paddle apertures for reducing delamination Electricity 5 Active
US7443011B2 System and method for routing supply voltages or other signals between side-by-side die and a lead frame for system in a package (SIP) devices Electricity 3 Active
US4463892A Method for manufacturing IC packages Electricity 2 Expired
USD728093S1 Enteral feeding device General 2 Active
US8039318B1 System and method for routing signals between side-by-side die in lead frame type system in a package (SIP) devices Electricity 1 Active
US9986639B2 Vertical magnetic barrier for integrated electronic module and related methods Electricity 1 Active
US7446677B2 Method and apparatus for optically detecting selections made on an input device Physics 1 Active
US7495320B2 System and method for providing a power bus in a wirebond leadframe package Electricity 1 Active
US7745263B2 System and method for routing supply voltages or other signals between side-by-side die and a lead frame for system in a package (SIP) devices Electricity 1 Active
US8021928B1 System and method for routing supply voltages or other signals between side-by-side die and a lead frame for system in a package (SIP) devices Electricity 1 Active
US7202546B2 Integrated circuit with copper interconnect and top level bonding/interconnect layer Electricity 0 Expired
US7902655B1 Multichip package leadframe including electrical bussing Electricity 0 Active
US7800205B2 Quad flat pack (QFP) package and flexible power distribution method therefor Electricity 0 Active
US8269334B1 Multichip package leadframe including electrical bussing Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.