I/O cell ESD system

US7446990B2 · kind B2 · utility

Assignee

• Freeescale Semiconductor, Inc. · US

Inventors

• James W. Miller · Austin, US
• Michael G. Khazhinsky · Austin, US
• Michael A. Stockinger · Austin, US
• James C. Weldon · Austin, US

Key dates

• Filing date: Feb 11, 2005
• Grant date: Nov 4, 2008
• Expiry date: Apr 15, 2026

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D89/921

Abstract

An ESD protection system for I/O cells of an integrated circuit. The I/O cells of a bank of cells include a first type of I/O cells having ESD trigger circuits and a second type of I/O cells having ESD clamp devices. In one embodiment, the ESD trigger circuits of the first type are located at the same area of an active circuitry floor plan as the area in the floor plan for the ESD clamp devices of the I/O cells of the second type.