Integrated circuit power supply network
US7453105B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 30, 2006 |
| Grant date | Nov 18, 2008 |
| Priority date | — |
| Expiry date | Jan 30, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit including an assembly of functional blocks and an interconnection network formed of at least N levels of conductive tracks separated by conductive via levels, the interconnection network including a power supply network comprising a first assembly of substantially parallel rails placed at the N-th track level, and a second assembly of substantially parallel rails placed at the (N−1)-th track level under the first rail assembly, the rails of the first assembly being non-parallel to those of the second assembly, the power supply network further including, for each functional block, a third assembly of power supply rails placed at the (N−2)-th track level above the elements of the considered block, and in which the rails of the second assembly form an acute angle smaller than 80° with the rails of each third rail assembly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.