Double mesh finfet

US7453125B1 · kind B1 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Alexander Nielsen · Ingolstadt, DE
• Bernhard Dobler · Erding, DE
• Georg Georgakos · Fraunberg, DE
• Ralf Weber · Duisburg, DE

Key dates

• Filing date: Apr 24, 2007
• Grant date: Nov 18, 2008
• Expiry date: Apr 24, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0158

Abstract

A multiple gate field-effect transistor is built from an overlapping mesh assembly. The assembly comprises a first layer comprising a semiconductor material formed into at least one fin, at least one source, and at least one drain. The first layer comprises a portion of a first mesh, electrically separated from the rest of the mesh. Similarly, a second layer is formed over the first layer and electrically isolated from the first layer, the second layer being electrically conductive and comprising a gate for the at least on fin of the transistor. The second layer comprises a portion of a second mesh offset from the first mesh and overlapping the first mesh, the second layer of the MuGFET device electrically separated from the rest of the second mesh.