Double-diffused-drain MOS device with floating non-insulator spacers
US7453127B2 · kind B2 · utility
5Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 13, 2006 |
| Grant date | Nov 18, 2008 |
| Priority date | — |
| Expiry date | Feb 13, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/111
Abstract
A double-diffused-drain metal-oxide-semiconductor device has a gate structure overlying a semiconductor substrate, a pair of insulator spacers on the sidewalls of the gate structure respectively, and a pair of floating non-insulator spacers embedded in the pair of insulator spacers respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.