Thermally enhanced electronic flip-chip packaging with external-connector-side die and method
US7456047B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2007 |
| Grant date | Nov 25, 2008 |
| Priority date | — |
| Expiry date | Aug 15, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49124
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for making a package having improved heat conduction characteristics and high frequency response. A relatively thick package substrate, such as copper, has a wiring layer bonded to one face, leaving the opposite face exposed, for example, to be a surface for connection to a heat sink. One or more chips are bonded to the wiring layer, and an array of connectors, such as solder balls are provided around the periphery of the chip(s) for connection to a printed circuit board. In some embodiments, the printed circuit board has a hole that the chip(s) extend into to allow smaller external-connection solder balls. In some embodiments, a second heat sink is connected to the back of the chip through the PCB hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.