On-die termination apparatus for semiconductor memory having exact comparison voltage characteristic and method of controlling the same
US7456651B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 28, 2006 |
| Grant date | Nov 25, 2008 |
| Priority date | — |
| Expiry date | Dec 28, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An on-die termination apparatus for a semiconductor memory according to the invention includes: a first D/A converting unit that outputs a first voltage corresponding to a first code; a first comparing unit that compares the first voltage to a reference voltage and corrects comparison results between the first voltage and the reference voltage, to output first comparison signals, wherein the first comparing unit is operated after a lapse of time from an initial operation time of the first D/A converting unit; a first counter that counts up or down the first code to correspond to the first comparison signals; a second D/A converting unit that outputs a second voltage corresponding to a second code; a second comparing unit that compares the second voltage to the reference voltage and corrects comparison results between the second voltage and the reference voltage, to output seconds comparison signals, wherein the second comparing unit is operated after a lapse of time from an initial operation time of the second D/A converting unit; a second counter that counts up or down the second code to correspond to the second comparison signals; and a timing control unit that controls timings w…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.