Memory device that provides test results to multiple output pads
US7457170B2 · kind B2 · utility
0Cited by
12References
25Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 14, 2005 |
| Grant date | Nov 25, 2008 |
| Priority date | — |
| Expiry date | Dec 28, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device including at least two output pads and at least two memory die. Each of the at least two memory die is configured to provide an output signal that includes compressed test results to any of the at least two output pads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.