Semiconductor memory and memory module
US7457176B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 28, 2006 |
| Grant date | Nov 25, 2008 |
| Priority date | — |
| Expiry date | May 31, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory is provided in which a verification result of a circuit operation in a test mode can be output from a memory module complying with the FB-DIMM even if the semiconductor memory is mounted on the memory module. The semiconductor memory includes: a command decoding section that decodes a command to start a read mode in which stored data is output or a test mode in which a predetermined circuit operation is executed and then an execution result thereof is output; a signal generating section that, based on the decoded command, generates a first or second data strobe signal showing an output timing of the stored data or the execution result; and a data-strobe-signal outputting section that outputs the first data strobe signal to an external terminal in the read mode and that outputs the second data strobe signal to the external terminal in the test mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.