Method of forming low-K interlevel dielectric layers and structures
US7459183B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2005 |
| Grant date | Dec 2, 2008 |
| Priority date | — |
| Expiry date | Apr 22, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1047
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a structure. The method including: forming a precursor layer on a substarte, the precursor layer including a resin and, polymeric nano-particles dispersed in the resin, and a solvent, each the polymeric nano-particle comprising a multi-arm core polymer and pendent polymers attached to the milti-arm core polymer and pendent polymers attached to the multi-arm core polymer, the multi-arm core polymer immiscible with the resin and the pendent polymers miscuble with the resin; heating the precursor layer to cross-link at least about 90% of the resin thereby converting the pre-baked precursor layer to a dielectric layer; forming trenches in the dielectric layer and filling the trenches with an electrical conductor; heating the dielectric layer to thermally decompose at least acout 99.5% of the polymeric nano-particles into decomposition products and to drive the decomposition products out of the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.