Method of fabricating silicon-based MEMS devices
US7459329B2 · kind B2 · utility
3Cited by
3References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 21, 2005 |
| Grant date | Dec 2, 2008 |
| Priority date | — |
| Expiry date | Aug 22, 2026 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2201/0167
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method of fabricating a silicon-based microstructure is disclosed, which involves depositing electrically conductive amorphous silicon doped with first and second dopants to produce a structure having a residual mechanical stress of less than +/=100 Mpa. The dopants can either be deposited in successive layers to produce a laminated structure with a residual mechanical stress of less than +/=100Mpa or simultaneously to produce a laminated structure having a mechanical stress of less than +/=100Mpa.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.