Resistance change memory device
US7459716B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 11, 2007 |
| Grant date | Dec 2, 2008 |
| Priority date | — |
| Expiry date | Jun 11, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/936
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A resistance change memory device including: a semiconductor substrate; cell arrays stacked above the substrate, bit lines word lines; a read/write circuit formed on the semiconductor substrate; first and second vertical wirings disposed to connect the bit lines to the read/write circuit; and third vertical wirings disposed to connect the word lines to the read/write circuit, wherein the memory cell includes a variable resistance element for storing as information a resistance value, which has a recording layer formed of a first composite compound expressed by AxMyOz (where “A” and “M” are cation elements different from each other; “O” oxygen; and 0.5≦x≦1.5, 0.5≦y≦2.5 and 1.5≦z≦4.5) and a second composite compound containing at least one transition element and a cavity site for housing a cation ion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.