Low cost high density rectifier matrix memory
US7460384B2 · kind B2 · utility
6Cited by
11References
6Claims
0Family size
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Key dates
| Filing date | Sep 19, 2005 |
| Grant date | Dec 2, 2008 |
| Priority date | — |
| Expiry date | Sep 6, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A high density memory device is fabricated three dimensionally in layers. To keep points of failure low, address decoding circuits are included within each layer so that, in addition to power and data lines, only the address signal lines need be interconnected between the layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.