Sequential access memory with system and method
US7460432B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 1, 2006 |
| Grant date | Dec 2, 2008 |
| Priority date | — |
| Expiry date | Jan 5, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sequential access memory (“SAM”) device, system and method is provided that includes a memory array configured to store a group of bytes on each of a plurality of rows. A plurality of bit-lines transfer each of the group of bytes into and out of the memory array, and a pre-charging unit is configured to pre-charge the plurality of bit-lines once per each transfer of one of the group of bytes into or out of one of the plurality of rows. The device operates by accessing a memory array in a SAM device by activating a selected row in the memory array, pre-charging a plurality of bit-lines that provide access to the memory array, and accessing the memory array before the plurality of bit-lines are pre-charged a second time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.