Transient cache storage with discard function for disposable data
US7461209B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 2005 |
| Grant date | Dec 2, 2008 |
| Priority date | — |
| Expiry date | Dec 23, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for storing non-critical processor information without imposing significant costs on a processor design is disclosed. Transient data are stored in the processor-local cache hierarchy. An additional control bit forms part of cache addresses, where addresses having the control bit set are designated as “transient storage addresses.” Transient storage addresses are not written back to external main memory and, when evicted from the last level of cache, are discarded. Preferably, transient storage addresses are “privileged” in that they are either not accessible to software or only accessible to supervisory or administrator-level software having appropriate permissions. A number of management functions/instructions are provided to allow administrator/supervisor software to manage and/or modify the behavior of transient cache storage. This transient storage scheme allows the cache hierarchy to store data items that may be used by the processor core but that may be too expensive to allocate to external memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.