Inventor · Hopewell Junction, NY, US

John-David Wellman

33Patents
10h-index
43Co-inventors
75Inventor score

Filing activity: Aug 15, 2000 → Jul 14, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US6678795B1 Method and apparatus for memory prefetching based on intra-page usage history Physics 59 Expired
US6779049B2 Symmetric multi-processing system with attached processing units being able to access a shared memory without being structurally configured with an address translation mechanism Physics 41 Expired
US7496733B2 System and method of execution of register pointer instructions ahead of instruction issues Physics 37 Active
US7793081B2 Implementing instruction set architectures with non-contiguous register file specifiers Physics 32 Active
US7421566B2 Implementing instruction set architectures with non-contiguous register file specifiers Physics 29 Active
US8918623B2 Implementing instruction set architectures with non-contiguous register file specifiers Physics 22 Active
US8166281B2 Implementing instruction set architectures with non-contiguous register file specifiers Physics 21 Active
US6711651B1 Method and apparatus for history-based movement of shared-data in coherent cache memories of a multiprocessor system using push prefetching Physics 20 Expired
US8589662B2 Accepting or rolling back execution of instructions based on comparing predicted and actual dependency control signals Physics 10 Active
US8151092B2 Control signal memoization in a multiple instruction issue microprocessor Physics 10 Active
US6820142B2 Token based DMA Physics 10 Expired
US6970982B2 Method and system for maintaining coherency in a multiprocessor system by broadcasting TLB invalidated entry instructions Physics 9 Expired
US6907477B2 Symmetric multi-processing system utilizing a DMAC to allow address translation for attached processors Physics 8 Expired
US8893095B2 Methods for generating code for an architecture encoding an extended register specification Physics 6 Active
US8091050B2 Modeling system-level effects of soft errors Physics 5 Active
US7461209B2 Transient cache storage with discard function for disposable data Physics 5 Active
US7340588B2 Extending the number of instruction bits in processors with fixed length instructions, in a manner compatible with existing code Physics 5 Expired
US9619385B2 Single thread cache miss rate estimation Physics 3 Active
US7509457B2 Non-homogeneous multi-processor system with shared memory Electricity 3 Active
US11740933B2 Heterogeneous system on a chip scheduler with learning agent Physics 2 Active
US8000953B2 Augmenting of automated clustering-based trace sampling methods by user-directed phase detection Physics 2 Active
US7325124B2 System and method of execution of register pointer instructions ahead of instruction issue Physics 2 Expired
US8312424B2 Methods for generating code for an architecture encoding an extended register specification Physics 2 Active
US7865699B2 Method and apparatus to extend the number of instruction bits in processors with fixed length instructions, in a manner compatible with existing code Physics 2 Active
US11704155B2 Heterogeneous system on a chip scheduler Physics 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.