System and method for alias mapping of address space
US7464249B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 26, 2005 |
| Grant date | Dec 9, 2008 |
| Priority date | — |
| Expiry date | Mar 18, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6042
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Mapping of address space by providing real storage including first and second address spaces. The second address space is smaller than and contained within the first address space. Provided within virtual storage is a system execution space. Providing within the system execution space is a system execution area having a size equal to or less than the second address space. The system execution area includes a control program having a first portion capable of addressing the first address space and the system execution space, a second portion constrained to address only the second address space and the system execution area, and at least one alias page. Responsive to a control program request for a first page in the virtual storage, a first frame is assigned in real storage corresponding to the page. Responsive to a request from the second portion of the control program for the first page, allocating an alias page in the system execution area, the alias page backed by the first frame.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.