Damian L. Osisek
164Patents
20h-index
88Co-inventors
93Inventor score
Filing activity: Oct 17, 1986 → Jun 1, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5410700A | Computer system which supports asynchronous commitment of data | Physics | 1,307 | Expired |
| US5555385A | Allocation of address spaces within virtual machine compute system | Physics | 210 | Expired |
| US5230069A | Apparatus and method for providing private and shared access to host address and data spaces by guest programs in a virtual machine computer system | Physics | 146 | Expired |
| US7197585B2 | Method and apparatus for managing the execution of a broadcast instruction on a guest processor | Physics | 50 | Expired |
| US7941799B2 | Interpreting I/O operation requests from pageable guests without host intervention | Emerging Cross-Sectional Technologies | 49 | Active |
| US7380041B2 | Managing input/output interruptions in non-dedicated interruption hardware environments | Physics | 43 | Active |
| US4809168A | Passive serialization in a multitasking environment | Physics | 42 | Expired |
| US7454548B2 | Managing input/output interruptions in non-dedicated interruption hardware environments, and methods therefor | Physics | 38 | Active |
| US8086811B2 | Optimizations of a perform frame management function issued by pageable guests | Physics | 33 | Active |
| US9317460B2 | Program event recording within a transactional environment | Physics | 30 | Active |
| US8103851B2 | Dynamic address translation with translation table entry format control for indentifying format of the translation table entry | Physics | 28 | Active |
| US8176279B2 | Managing use of storage by multiple pageable guests of a computing environment | Physics | 25 | Active |
| US9311259B2 | Program event recording within a transactional environment | Physics | 24 | Active |
| US8380907B2 | Method, system and computer program product for providing filtering of GUEST2 quiesce requests | Physics | 23 | Active |
| US8364912B2 | Use of test protection instruction in computing environments that support pageable guests | Physics | 23 | Active |
| US8041923B2 | Load page table entry address instruction execution based on an address translation format control field | Physics | 22 | Active |
| US8909899B2 | Emulating execution of a perform frame management instruction | Physics | 22 | Active |
| US8117417B2 | Dynamic address translation with change record override | Physics | 21 | Active |
| US8387049B2 | Facilitating processing within computing environments supporting pageable guests | Physics | 20 | Active |
| US7552436B2 | Memory mapped input/output virtualization | Physics | 20 | Active |
| US8417916B2 | Perform frame management function instruction for setting storage keys and clearing blocks of main storage | Physics | 19 | Active |
| US7827321B2 | Central processing unit measurement facility | Physics | 16 | Active |
| US8151083B2 | Dynamic address translation with frame management | Physics | 16 | Active |
| US8335906B2 | Perform frame management function instruction for clearing blocks of main storage | Physics | 15 | Active |
| US8037278B2 | Dynamic address translation with format control | Physics | 15 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.