Data processing system and method for efficient storage of metadata in a system memory
US7467323B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 10, 2005 |
| Grant date | Dec 16, 2008 |
| Priority date | — |
| Expiry date | Jan 7, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0831
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cache coherent data processing system includes a plurality of processing units each having at least an associated cache, a system memory, and a memory controller that is coupled to and controls access to the system memory. The system memory includes a plurality of storage locations for storing a memory block of data, where each of the plurality of storage locations is sized to store a sub-block of data. The system memory further includes metadata storage for storing metadata, such as a domain indicator, describing the memory block. In response to a failure of a storage location for a particular sub-block among the plurality of sub-blocks, the memory controller overwrites at least a portion of the metadata in the metadata storage with the particular sub-block of data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.