Semiconductor structure and method

US7468307B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Walter Hartner · Munich, DE
• Andreas Meiser · Unterhaching, DE
• Hermann Gruber · Leverkusen, DE
• Dietrich Bonart · Bad Abbach, DE
• Thomas R. Gross · Sinzing, DE

Key dates

• Filing date: Jun 28, 2006
• Grant date: Dec 23, 2008
• Expiry date: Aug 17, 2026

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/116
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor structure includes a semiconductor layer stack includes a semiconductor substrate of a first conductivity type, a heavily-doped buried layer of a second conductivity type, and a monocrystalline semiconductor layer of a third conductivity type formed on top of the semiconductor layer and the buried layer, a contact to the buried layer, the contact formed in a contact hole, and a lateral insulation of different portions of the semiconductor structure, the insulation formed in an isolation trench. A contact to the semiconductor substrate may be formed within the isolation trench.