Apparatus and method for dynamically repairing a semiconductor memory
US7468922B2 · kind B2 · utility
3Cited by
51References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 24, 2007 |
| Grant date | Dec 23, 2008 |
| Priority date | — |
| Expiry date | Apr 24, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/4002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An architecture for dynamically repairing a semiconductor memory, such as a Dynamic Random Access Memory (DRAM), includes circuitry for dynamically storing memory element remapping information. Memory is tested for errors by writing, then reading a plurality of memory blocks, such as rows or columns, in parallel. Memory is dynamically reprogrammed in order to remap unused spare memory elements for failed memory elements when errors are detected. Unused spare memory elements are remapped utilizing a circuit that overrides unblown fuses or antifuses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.