Patent · US Active

Memory device and method for operating a memory device

US7468931B2 · kind B2 · utility

0Cited by

3References

41Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Andreas Wenzel · Munich, DE
Stefan Ruping · Lengdorf, DE
Steffen Sonnekalb · Munich, DE

Key dates

Filing date	Jul 18, 2006
Grant date	Dec 23, 2008
Priority date	—
Expiry date	Apr 2, 2027

Classification

Technology area (CPC G)Physics
CPC primaryG11C8/10
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A memory arrangement having a memory area with a plurality of memory locations, to which external addresses can be allocated, and an address decoder which is coupled to the memory area and which includes an address input for applying an external address. The address decoder can be switched so that one of the external addresses of an address range is allocated to each memory location of the memory area, or that one of the external addresses of a sub-address range of the address range is allocated to each memory location only within a part-memory area of the memory area. The address decoder is also arranged for identifying the memory location allocated to the external address applied.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.