Built-in design edit structures
US7470553B1 · kind B1 · utility
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1References
11Claims
0Family size
Assignee
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Key dates
| Filing date | May 12, 2005 |
| Grant date | Dec 30, 2008 |
| Priority date | — |
| Expiry date | Feb 28, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/209
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In an IC structure and method for debugging or adjusting the parameters of an IC circuitry, edit structures are formed in the IC device and are connected to desired portions of the IC circuitry buy forming vias through the passivation layer overlying the top metal layer and forming metal interconnects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.