Method of manufacturing a semiconductor device
US7470568B2 · kind B2 · utility
0Cited by
2References
7Claims
0Family size
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Key dates
| Filing date | Jul 31, 2007 |
| Grant date | Dec 30, 2008 |
| Priority date | — |
| Expiry date | Jul 31, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Salient electrodes on a semiconductor chip and leads on a film substrate are to be connected together with a high accuracy. A change in lead pitch which occurs at the time of connecting salient electrodes on a semiconductor chip and inner leads on a film substrate with each other is taken into account and a correction is made beforehand to the pitch of the inner leads. Likewise, a change in lead pitch which occurs at the time of connecting electrodes on a liquid crystal substrate and outer leads on the film substrate with each other is taken into account and a correction is made beforehand to the pitch of the outer leads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.