Self-aligned silicon carbide semiconductor devices and methods of making the same
US7470967B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2005 |
| Grant date | Dec 30, 2008 |
| Priority date | — |
| Expiry date | Mar 11, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/62
Abstract
A self-aligned silicon carbide power MESFET with improved current stability and a method of making the device are described. The device, which includes raised source and drain regions separated by a gate recess, has improved current stability as a result of reduced surface trapping effects even at low gate biases. The device can be made using a self-aligned process in which a substrate comprising an n+-doped SiC layer on an n-doped SiC channel layer is etched to define raised source and drain regions (e.g., raised fingers) using a metal etch mask. The metal etch mask is then annealed to form source and drain ohmic contacts. A single- or multilayer dielectric film is then grown or deposited and anisotropically etched. A Schottky contact layer and a final metal layer are subsequently deposited using evaporation or another anisotropic deposition technique followed by an optional isotropic etch of dielectric layer or layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.