Technique for manufacturing an overmolded electronic assembly
US7473585B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2005 |
| Grant date | Jan 6, 2009 |
| Priority date | — |
| Expiry date | Oct 11, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1316
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A technique for manufacturing an electronic assembly includes a number of steps. Initially, a backplate with a cavity formed into a first side of the backplate is provided. Next, a substrate with a first side of an integrated circuit (IC) die mounted to a first side of the substrate is provided. The IC die is electrically connected to one or more of a plurality of electrically conductive traces formed on the first side of the substrate. The substrate includes a hole approximate an outer edge of the IC die. The first side of the substrate is then positioned in contact with at least a portion of the first side of the backplate. The IC die is positioned within the cavity with a second side of the IC die in thermal contact with the backplate. The substrate and at least a portion of the backplate are overmolded with an overmold material, which enters the cavity through the hold to substantially underfill the IC die and substantially fill an unoccupied portion of the cavity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.