Method of forming pattern using fine pitch hard mask
US7473647B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 6, 2006 |
| Grant date | Jan 6, 2009 |
| Priority date | — |
| Expiry date | Jul 6, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0338
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a fine pattern of a semiconductor device using a fine pitch hard mask is provided. A first hard mask pattern including first line patterns formed on an etch target layer of a substrate with a first pitch is formed. A first layer including a top surface where a recess is formed between adjacent first line patterns is formed. A second hard mask pattern including second line patterns within the recess is formed. An anisotropic etching process is performed on the first layer using the first and the second line patterns as an etch mask. Another anisotropic etching process is performed on the etch target layer using the first and the second hard mask patterns as an etch mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.