Integrated semiconductor memory device
US7474552B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 8, 2006 |
| Grant date | Jan 6, 2009 |
| Priority date | — |
| Expiry date | Mar 30, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4093
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated semiconductor memory device comprises: a receiver circuit for receiving a data signal, a receiver circuit for receiving a command signal, and a receiver circuit for receiving an address signal. A programmable storage unit comprises programmable elements. A current of the receiver circuits is controlled in dependence on a state of the programmable elements of the programmable storage unit. Depending on the application in which the integrated semiconductor memory device is used, the current of the receiver circuits is increased or decreased. By decreasing the current of the receiver circuits a dissipation loss of the integrated semiconductor memory device is reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.