HyperJTAG system including debug probe, on-chip instrumentation, and protocol
US7475303B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2004 |
| Grant date | Jan 6, 2009 |
| Priority date | — |
| Expiry date | Jul 4, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2236
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system for simultaneously interfacing multiple test instruments with multiple processor cores includes an on-chip instrumentation, a probe, and a connection mechanism for providing a transmission path between the probe and the on-chip instrumentation. The on-chip instrumentation includes an on-chip instrumentation concentrator and an on-chip instrumentation de-concentrator. The probe includes a probe concentrator and a probe de-concentrator. The probe concentrator concentrates signals from the test instruments into a first serial signal stream for transmission over the connector mechanism. The on-chip instrumentation de-concentrator de-concentrates the first serial signal stream into signals to be directed to at least one of the processor cores. The on-chip instrumentation concentrator concentrates signals from the processor cores into a second serial signal stream for transmission over the connector mechanism. The probe de-concentrator de-concentrates the second serial signal stream into signals to be directed to at least one of the testing instruments. Using this system, the testing instruments are able to simultaneously access and control respective processor cores. In one pre…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.