Writing a circuit design pattern with shaped particle beam flashes
US7476880B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 3, 2005 |
| Grant date | Jan 13, 2009 |
| Priority date | — |
| Expiry date | Apr 24, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S430/143
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A shaped particle beam writing strategy can be used to write a pattern with a particle beam onto a substrate. The pattern comprises a circuit design that is fractured into a plurality of arbitrary polygons. The writing strategy comprises transforming and fracturing the arbitrary polygons into a plurality of restricted polygons, each restricted polygon being represented by a location coordinate, at least two dimension coordinates, and at least one external edge indicator. Thereafter, the restricted polygons are tiled into a set of tiles comprising interior tiles and external edge tiles. Flash data is assigned for each tile such that the interior tiles are assigned a first flash area and the external edge tiles are assigned a second flash area that is smaller than the first flash area. The flash data is arranged in a selected order to write the pattern with a modulated particle beam, such as an electron beam, on a substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.