Data processing unit
US7477660B1 · kind B1 · utility
0Cited by
23References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 26, 2005 |
| Grant date | Jan 13, 2009 |
| Priority date | — |
| Expiry date | May 26, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0608
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A system and method for frame detection and generation. Each incoming clock-data stream is divided into two independent data streams: a clock path which preserves the timing of the individual clock domains and a data path which multiplexes an arbitrary number of data streams onto a parallel path. A framer array structure implements a context swap and synchronizes the data streams.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.