Method for inspecting a pattern and method for manufacturing a semiconductor chip having a circuit pattern
US7477773B2 · kind B2 · utility
0Cited by
9References
5Claims
0Family size
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Key dates
| Filing date | Oct 18, 2004 |
| Grant date | Jan 13, 2009 |
| Priority date | — |
| Expiry date | Aug 18, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2207/30148
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for inspecting a pattern includes measuring, in a first direction, a width of a reference pattern at plural positions in the reference patter; measuring, in a second direction, a width of the reference pattern at the plural positions. Comparing the first and second width and determining which of the first and second widths is shortest; extracting a defect in a pattern to be inspected; and evaluating the extracted defect depending on the determined direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.