Feed forward silicide control scheme based on spacer height controlling preclean time
US7479436B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2006 |
| Grant date | Jan 20, 2009 |
| Priority date | — |
| Expiry date | Jul 15, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments herein present a method for a feed forward silicide control scheme based on spacer height controlling pre-clean time. The method forms field effect transistor gates over a substrate and then forms spacers on the gates. Next, the method measures the spacers using an atomic force microscope to determine a measured spacer height. The method then conducts a pre-cleaning etch, wherein a duration of the pre-cleaning is adjusted according to the measured spacer height. If the measured spacer height is below a predetermined amount, the duration of the pre-cleaning is reduced; and, if the measured spacer height is above a predetermined amount, the duration of the pre-cleaning is increased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.