Circuit for digital frequency synthesis in an integrated circuit
US7479814B1 · kind B1 · utility
9Cited by
9References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2005 |
| Grant date | Jan 20, 2009 |
| Priority date | — |
| Expiry date | Jul 30, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0995
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for frequency synthesis in an integrated circuit is described. The circuit comprises an oscillator circuit having a counter-controlled delay line. A delay register is coupled to the counter-controlled delay line. The delay register stores a delay value for the counter-controlled delay line. Finally, a phase synchronizer circuit, coupled to the oscillator circuit, controls the starting and stopping of the oscillator circuit. According to alternate embodiments, a control circuit is coupled to the oscillator circuit for changing the frequency synthesizer from a low frequency mode to a high frequency mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.