Method and system for performing a hardware trace
US7480833B2 · kind B2 · utility
1Cited by
9References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2007 |
| Grant date | Jan 20, 2009 |
| Priority date | — |
| Expiry date | Jul 18, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2268
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and systems for pre-detecting a hardware hang in a processor. The methods comprise maintaining a count of a number of cycles in a predefined time interval without an instruction being completed; detecting a pre-hang condition if said count is within N counts of a hang limit; initiating trace capture in response to detecting said pre-hang condition; and detecting a hang condition if said count equals said hang limit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.