Process for resurf diffusion for high voltage MOSFET
US7482205B2 · kind B2 · utility
14Cited by
8References
5Claims
0Family size
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Key dates
| Filing date | Dec 11, 2006 |
| Grant date | Jan 27, 2009 |
| Priority date | — |
| Expiry date | Dec 11, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/393
Abstract
A starting wafer for high voltage semiconductor devices is formed by implanting arsenic into the top surface of a p type silicon substrate wafer to a depth of about 0.1 micron. A N type non-graded epitaxial layer is then grown atop the substrate without any diffusion step so that the arsenic is not intentionally driven. Device junction are then diffused into the epitaxially grown layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.