Frequency modulated output clock from a digital frequency/phase locked loop
US7482880B2 · kind B2 · utility
5Cited by
3References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2006 |
| Grant date | Jan 27, 2009 |
| Priority date | — |
| Expiry date | Feb 28, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/50
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A frequency modulated output of a Digital Locked Loop (DLL) is implemented with a Johnson Counter outputting a sample clock and a synchronized digital code at a multiple of the sample clock. The digital code drives a digital-to-analog converter to generate a frequency modulated control signal. The control signal is summed with the center frequency control from the digital locked loop digital filter to provide a frequency modulated center frequency control signal to the DLL oscillator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.