Read, write, and erase circuit for programmable memory devices
US7483294B2 · kind B2 · utility
10Cited by
0References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 20, 2007 |
| Grant date | Jan 27, 2009 |
| Priority date | — |
| Expiry date | Aug 20, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5645
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit for writing, reading, and erasing a programmable device is disclosed. The programmable device includes an ion conductor and a plurality of electrodes. Electrical properties of the device are altered by applying a sufficient bias across the electrode to form a conductive region within the ion conductor. The circuit can be used to program and read multiple bits within a single programmable device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.