Phase change memory cell with electrode
US7485487B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 7, 2008 |
| Grant date | Feb 3, 2009 |
| Priority date | — |
| Expiry date | Jan 7, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8828
Abstract
The present invention in one embodiment provides a method of forming a memory device including providing a first dielectric layer including at least one via containing a metal stud; providing a second dielectric layer atop the first dielectric layer; recessing the metal stud to expose a sidewall of the via; etching the sidewall of the via in the first dielectric layer with a isotropic etch step to produce an undercut region extending beneath a portion of the second dielectric layer; forming a conformal insulating layer on at least the portion of the second dielectric layer overlying the undercut region to provide a keyhole; etching the conformal insulating layer with an anisotropic etch to provide a collar that exposes the metal stud; forming a barrier metal within the collar in contact with the metal stud; and forming a phase change material in contact with the barrier metal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.