Signal detector with calibration circuit arrangement
US7486114B2 · kind B2 · utility
9Cited by
9References
35Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 17, 2006 |
| Grant date | Feb 3, 2009 |
| Priority date | — |
| Expiry date | Aug 22, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0296
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A signal detector and method to detect the presence or absence of an incoming differential signal. The method nullifies the DC off-set of the signal detector so that it can detect a signal within a very narrow window. The common mode levels of the signal and reference paths are used for calibration which is done automatically by use of an embedded algorithm residing in a digital block. The calibration range and resolution are predetermined to cope with the technology, modeling, design methodology and human error.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.