CMOS image sensor and method for forming the same
US7488637B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 16, 2005 |
| Grant date | Feb 10, 2009 |
| Priority date | — |
| Expiry date | Oct 12, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/026
Abstract
A CMOS image sensor and a method for forming the same are provided. According to the method, a gate insulating layer and a doped polysilicon layer which are sequentially stacked on a substrate are patterned to form a transfer gate and a reset gate set apart from each other. A floating diffusion layer between the transfer gate and the reset gate, a light receiving element at a side of the transfer gate away from and opposite to the floating diffusion layer and a source/drain region at a side of the reset gate away from and opposite to the floating diffusion layer are formed. An insulation layer and a mold layer are sequentially formed on an entire surface of the substrate, and the mold layer is planarized until the insulation layer is exposed. The exposed insulation layer is removed to further expose an upper surface of the gates. A selective silicidation process is carried out using a metal gate layer to form a metal gate silicide on the exposed gate. The sequential steps in the selective silicidation process alleviate the metal contamination prevalent in various wet cleaning processes that may increase the malfunction of CMOS image sensors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.