Method to make markers for double gate SOI processing

US7488669B2 · kind B2 · utility

Assignees

• INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM VZW · BE
• KONINKLIJKE PHILIPS ELECTRONICS NV · NL

Inventors

• Josine Loo · Leuven, BE
• Youri Victorovitch Ponomarev · Leuven, BE
• David William Laidler · Leuven, BE

Key dates

• Filing date: Mar 16, 2005
• Grant date: Feb 10, 2009
• Expiry date: Mar 31, 2026

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6734

Abstract

A method of making at least one marker (MX) for double gate SOI processing on a SOI wafer is disclosed. The marker has a diffracting structure in a first direction and the diffracting structure is configured to generate an asymmetrical diffraction pattern during use in an alignment and overlay detection system for detection in the first direction.