Integrated circuits with inductors in multiple conductive layers
US7489220B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 20, 2005 |
| Grant date | Feb 10, 2009 |
| Priority date | — |
| Expiry date | Oct 12, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01F2021/125
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Two inductors formed in multiple layers of conductive layers of integrated circuits are disclosed. Symmetric portions of a first inductor and a second inductor are formed in two or more conductive layers. Portions of the first inductor in adjacent conductive layers are connected by vias, and portions of the second inductor in adjacent conductive layers are connected by vias. The first and second inductor portions form a substantially loop-shaped structure in each conductive layer. The first and second inductor vias may be positioned at the same position within the substantially loop-shaped inductor structure by alternating inner and outer radiuses, or the vias for the second inductor may be positioned opposite the vias for the first inductor within the substantially loop-shaped inductor structure, using notches in the first and second inductor portions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.