Using constraints to simplify a memory controller
US7490204B2 · kind B2 · utility
1Cited by
2References
4Claims
0Family size
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Key dates
| Filing date | Apr 7, 2005 |
| Grant date | Feb 10, 2009 |
| Priority date | — |
| Expiry date | Dec 13, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1694
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory controller design tool retrieves parameter ranges supported by a memory controller, and identifies troublesome parameter value combinations. The memory controller design tool suggests to 1) add logic to the memory controller to resolve the conflict, 2) incorporate a constraint that reduces/eliminates command collisions, data conflicts, and/or the need to check particular timing parameters, or 3) a combination of both. The memory controller design tool may work in conjunction with a memory controller designer to define and use the constraints.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.