Inventor · Rochester, MN, US

Mark David Bellows

25Patents

5h-index

14Co-inventors

62Inventor score

Filing activity: Sep 26, 2002 → Aug 19, 2015

Most-cited inventions

Patent	Title	Area	Cited by	Status
US7558908B2	Structure of sequencers that perform initial and periodic calibrations in a memory system	Physics	9	Active
US8219745B2	Memory controller to utilize DRAM write buffers	Physics	8	Active
US7840744B2	Rank select operation between an XIO interface and a double data rate interface	Physics	7	Active
US7757040B2	Memory command and address conversion between an XDR interface and a double data rate interface	Physics	5	Active
US7467277B2	Memory controller operating in a system with a variable system clock	Emerging Cross-Sectional Technologies	5	Active
US9146835B2	Methods and systems with delayed execution of multiple processors	Physics	3	Active
US7631154B2	Handling of the transmit enable signal in a dynamic random access memory controller	Physics	3	Active
US7380083B2	Memory controller capable of locating an open command cycle to issue a precharge packet	Physics	3	Expired
US7380052B2	Reuse of functional data buffers for pattern buffers in XDR DRAM	Physics	3	Expired
US7206284B2	Method and apparatus for automatic congestion avoidance for differentiated service flows	Electricity	2	Expired
US7761682B2	Memory controller operating in a system with a variable system clock	Emerging Cross-Sectional Technologies	2	Active
US7356642B2	Deferring refreshes during calibrations in memory systems	Physics	2	Expired
US7490204B2	Using constraints to simplify a memory controller	Physics	1	Expired
US7283562B2	Method and apparatus for scaling input bandwidth for bandwidth allocation technology	Electricity	1	Expired
US7752379B2	Managing write-to-read turnarounds in an early read after write memory system	Physics	1	Active
US7669028B2	Optimizing data bandwidth across a variable asynchronous clock domain	Physics	0	Active
US7613873B2	Deferring refreshes during calibrations in memory systems	Physics	0	Active
US7321950B2	Method and apparatus for managing write-to-read turnarounds in an early read after write memory system	Physics	0	Expired
US7305517B2	Structure of sequencers that perform initial and periodic calibrations in a memory system	Physics	0	Expired
US7321961B2	Method and apparatus to avoid collisions between row activate and column read or column write commands	Physics	0	Expired
US9405315B2	Delayed execution of program code on multiple processors	Physics	0	Active
US7275137B2	Handling of the transmit enable signal in a dynamic random access memory controller	Physics	0	Expired
US7487318B2	Managing write-to-read turnarounds in an early read after write memory system	Physics	0	Active
US7660246B2	Method and apparatus for scaling input bandwidth for bandwidth allocation technology	Electricity	0	Active
US7925823B2	Reuse of functional data buffers for pattern buffers in XDR DRAM	Physics	0	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.