Method for making a semiconductor device having a semiconductor-on-insulator (SOI) configuration and including a superlattice on a thin semiconductor layer
US7491587B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 30, 2006 |
| Grant date | Feb 17, 2009 |
| Priority date | — |
| Expiry date | May 9, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/7624
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for making a semiconductor device may include forming an insulating layer on a substrate, and forming a semiconductor layer on the insulating layer on a side thereof opposite the substrate. The method may further include forming a superlattice on the semiconductor layer on a side thereof opposite the insulating layer. The superlattice may include a plurality of stacked groups of layers, with each group comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon. Moreover, the at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.